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| The JN5121 is the first in a series of
low power, low cost IEEE802.15.4 compliant wireless microcontrollers.
Combining on chip 32-bit RISC core, fully compliant 2.4GHz IEEE80215.4
transceiver, 64Kb ROM and 96Kb of RAM provides a versatile low cost
solution for wireless sensor networking applications. The high level
of integration helps to reduce the overall system cost. In particular,
the ROM enables integration of point-to-point and mesh network stack
protocols, and the RAM allows support of router and controller functions
without the need for additional external memory. The JN5121 uses
hardware MAC and highly secure AES encryption accelerators for low
power and minimum processor overhead. Integrated sleep oscillator
and power saving facilities are provided, giving low system power
consumption. The device also incorporates a wide range of digital
and analogue peripherals for the user to connect to their application. |
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 Block
Diagram |
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Features: Transceiver
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2.4GHz IEEE802.15.4 compliant
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Security processor (128-bit AES)
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MAC accelerator with packet formatting, CRCs, address check, auto-acks,
timers
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Integrated power management and sleep oscillator for low power
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On-chip power regulation for 2.2V to 3.6V battery operation
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Sleep current (with active beacon timer) < 5μA
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Minimum of external components at < US$1 cost
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Rx current < 50mA
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Tx current < 40mA
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Receiver sensitivity -93dBm
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Transmit power +1dBm
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Features: Microcontroller
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16MHz 32-bit RISC optimized for low power (3MIPS/mA) and efficient
code density
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96k RAM for shared program, data and routing tables
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64k ROM for program code
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4-input 12-bit ADC, 2 11-bit DACs, 2 comparators, temperature
sensor
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2 Application timer/counters, 3 system timers
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2 UARTs (one for in-system debug)
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SPI port with 5 selects
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2 wire serial interface
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21 GPIO
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Industrial temperature range (-40°C to +85°C)
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8x8mm 56 lead QFN package
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Lead-free and RoHS compliant
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 Application
Daigram |
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